Size reduction of metal-oxide-semiconductor field-effect transistors (MOSFETs), including reduction of the gate length and gate oxide thickness, has enabled the continued improvement in speed, performance, density, and cost per unit function of integrated circuits over the past few decades. Generally, the MOSFETs include a gate electrode formed on a gate dielectric, which is formed on a substrate (usually a silicon semiconductor substrate). Source/drain regions are formed on opposing sides of the gate electrode by implanting N-type or P-type impurities into the substrate. Current flowing through the source/drain regions may then be controlled by controlling the voltage levels applied to the gate electrode.
To increase switching speed and decrease contact resistance, the source/drain regions are often silicided. Typically, the source/drain regions are silicided by forming a metal layer over the source/drain regions and performing an anneal. The annealing causes the metal layer to react with the silicon substrate, thereby forming a silicide layer on the source/drain regions. The silicide layer, however, may cause problems.
One problem is lateral encroachment of the silicide region below the spacers. It has been found, particularly in the case of nickel silicide formed in a substrate doped with N-type impurities, that the silicide region may encroach laterally underneath the spacers, thereby increasing leakage current and decreasing device performance. As device sizes decrease, the lateral encroachment of the silicide region may cause the device to fail or to become unreliable.
Therefore, there is a need for a method and a device that reduce the lateral encroachment of the silicide region.